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1

[IEEE 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - Liberec, Czech Republic (2009.04.15-2009.04.17)] 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - MDCT / IMDCT low power implementations in 90 nm CMOS technology for MP3 audio

Malik, Peter, Ufnal, Michal, Luczyk, Arkadiusz W., Balaz, Marcel, Pleskacz, Witold A.

Year:

2009

Language:

english

File:

PDF, 368 KB

english, 2009

2

Probabilistic analysis of CMOS physical defects in VLSI circuits for test coverage improvement

M. Blyzniuk, I. Kazymyra, W. Kuzmicz, W.A. Pleskacz, J. Raik, R. Ubar

Journal:

Microelectronics Reliability

Year:

2001

Language:

english

File:

PDF, 686 KB

english, 2001

3

[IEEE 2008 11th International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS) - Bratislava, Slovakia (2008.04.16-2008.04.18)] 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems - A Resistorless Voltage Reference Source for 90 nm CMOS Technology with Low Sensitivity to Process and Temperature Variations

Borejko, Tomasz, Pleskacz, Witold A.

Year:

2008

Language:

english

File:

PDF, 4.35 MB

english, 2008

4

UVM-based Verification of Bluetooth Low Energy Controller

M. Moskala, P. Kloczko, M. Cieplucha, W. Pleskacz

Year:

2015

Language:

english

File:

PDF, 321 KB

english, 2015

5

Hierarchical test generation for combinational circuits with real defects coverage

T Cibáková, M Fischerová, E Gramatová, W Kuzmicz, W.A Pleskacz, J Raik, R Ubar

Journal:

Microelectronics Reliability

Year:

2002

Language:

english

File:

PDF, 252 KB

english, 2002

6

Improvement of integrated circuit testing reliability by using the defect based approach

Dominik Kasprowicz, Witold A. Pleskacz

Journal:

Microelectronics Reliability

Year:

2003

Language:

english

File:

PDF, 244 KB

english, 2003

7

[IEEE Systems (DDECS) - Cottbus, Germany (2011.04.13-2011.04.15)] 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems - PVT tolerant LC-VCO in 90 nm CMOS technology for GPS/Galileo applications

Siwiec, Krzysztof, Borejko, Tomasz, Pleskacz, Witold A.

Year:

2011

Language:

english

File:

PDF, 1.57 MB

english, 2011

8

[IEEE Comput. Soc IEEE European Test Workshop - Cascais, Portugal (23-26 May 2000)] Proceedings IEEE European Test Workshop - Hierarchical defect-oriented fault simulation for digital circuits

Blyzniuk, M., Cibakova, T., Gramatova, E., Kuzmicz, W., Lobur, M., Pleskacz, W., Raik, J., Ubar, R.

Year:

2000

Language:

english

File:

PDF, 585 KB

english, 2000

9

[IEEE Comput. Soc IEEE 2001 2nd International Symposium on Quality Electronic Design. IEEE ISQED 2001 - San Jose, CA, USA (26-28 March 2001)] Proceedings of the IEEE 2001. 2nd International Symposium on Quality Electronic Design - Defect-oriented fault simulation and test generation in digital circuits

Kuzmicz, W., Pleskacz, W., Raik, J., Ubar, R.

Year:

2001

Language:

english

File:

PDF, 682 KB

english, 2001

10

[IEEE 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Kosice, Slovakia (2016.4.20-2016.4.22)] 2016 IEEE 19th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Precision human body temperature measurement based on thermistor sensor

Narczyk, Pawel, Siwiec, Krzysztof, Pleskacz, Witold A.

Year:

2016

Language:

english

File:

PDF, 981 KB

english, 2016

11

[IEEE 2016 MIXDES - 23rd International Conference "Mixed Design of Integrated Circuits and Systems" - Lodz, Poland (2016.6.23-2016.6.25)] 2016 MIXDES - 23rd International Conference Mixed Design of Integrated Circuits and Systems - Architecture and design of a Bluetooth Low Energy Controller

Wiecha, Pawel, Cieplucha, Marek, Kloczko, Patryk, Pleskacz, Witold A.

Year:

2016

Language:

english

File:

PDF, 497 KB

english, 2016

12

[IEEE 2017 MIXDES - 24th International Conference "Mixed Design of Integrated Circuits and Systems" - Bydgoszcz, Poland (2017.6.22-2017.6.24)] 2017 MIXDES - 24th International Conference "Mixed Design of Integrated Circuits and Systems - Principal component analysis of accelerations in human dynamic movements: A sample set length effect study

Luczyk, Arkadiusz W., Neneman, Konrad, Pleskacz, Witold A.

Year:

2017

File:

PDF, 7 KB

2017

13

[IEEE 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" - Rzeszów, Poland (2019.6.27-2019.6.29)] 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" - DC/DC Buck Converter with Build-in Tuned Sawtooth Wave Generator Using CMOS Technology

Borkowski, Adam, Borejko, Tomasz, Pleskacz, Witold A.

Year:

2019

File:

PDF, 748 KB

2019

14

[IEEE 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" - Rzeszów, Poland (2019.6.27-2019.6.29)] 2019 MIXDES - 26th International Conference "Mixed Design of Integrated Circuits and Systems" - Implementation and Comparison of SPA and DPA Countermeasures for Elliptic Curve Point Multiplication

Ostrowski, Lukasz, Marcinek, Krzysztof, Pleskacz, Witold A.

Year:

2019

File:

PDF, 553 KB

2019

15

Accuracy of a remote quantitative image analysis in the whole slide images

Janina Słodkowska, Tomasz Markiewicz, Bartłomiej Grala, Wojciech Kozłowski, Wielisław Papierz, Katarzyna Pleskacz, Piotr Murawski

Journal:

Diagnostic Pathology

Year:

2011

Language:

english

File:

PDF, 502 KB

english, 2011

16

Elektrogustometr uniwersalny EG-2

Andrzej Wałkanis, Michał Czesak, Witold A. Pleskacz

Journal:

Otolaryngologia Polska

Year:

2011

Language:

polish

File:

PDF, 364 KB

polish, 2011

17

DefSim: A Remote Laboratory for Studying Physical Defects in CMOS Digital Circuits

Pleskacz, W.A., Stopjakova, V., Borejko, T., Jutman, A., Wakanis, A.

Journal:

IEEE Transactions on Industrial Electronics

Year:

2008

Language:

english

File:

PDF, 1.63 MB

english, 2008

18

[IEEE 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Tallinn, Estonia (2012.04.18-2012.04.20)] 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - LC-VCO design automation tool for nanometer CMOS technology

Siwiec, Krzysztof, Borejko, Tomasz, Pleskacz, Witold A.

Year:

2012

Language:

english

File:

PDF, 987 KB

english, 2012

19

A DRC-based algorithm for extraction of critical areas for opens in large VLSI circuits

Pleskacz, W.A., Ouyang, C.H., Maly, W.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

1999

Language:

english

File:

PDF, 580 KB

english, 1999

20

scattering in the full range of scattering angles

Kłosowski, Łukasz, Piwiński, Mariusz, Dziczek, Dariusz, Pleskacz, Katarzyna, Chwirot, Stanisław

Journal:

Physical Review A

Year:

2009

Language:

english

File:

PDF, 340 KB

english, 2009

21

ELEON3LP – Superscalar and low-power enhancements of single issue general purpose processor model

Marcinek, Krzysztof, Pleskacz, Witold A.

Journal:

Microprocessors and Microsystems

Year:

2013

Language:

english

File:

PDF, 1.07 MB

english, 2013

22

[IEEE 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Karlovy Vary, Czech Republic (2013.04.8-2013.04.10)] 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Intermediate frequency filter calibration method for radio frequency receivers in modern CMOS technologies

Siwiec, Krzysztof, Koter, Aleksander, Pleskacz, Witold A.

Year:

2013

Language:

english

File:

PDF, 756 KB

english, 2013

23

[IEEE Systems (DDECS) - Cottbus, Germany (2011.04.13-2011.04.15)] 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems - CAD tool for PLL Design

Siwiec, Krzysztof, Borejko, Tomasz, Pleskacz, Witold A.

Year:

2011

Language:

english

File:

PDF, 692 KB

english, 2011

24

Ocena zmysłu smaku i węchu u pacjentów z polipami nosa

Dżaman, Karolina, Pleskacz, Witold A., Wałkanis, Andrzej, Rapiejko, Piotr, Jurkiewicz, Dariusz

Journal:

Otolaryngologia Polska

Year:

2007

Language:

polish

File:

PDF, 114 KB

polish, 2007

25

Percepcja smaku u chorych z przewlekłym zapaleniem zatok przynosowych z polipami nosa leczonych doustną glikokortykosteroidoterapią

Dżaman, Karolina, Rapiejko, Piotr, Szczygielski, Kornel, Pleskacz, Witold, Jurkiewicz, Dariusz

Journal:

Otolaryngologia Polska

Year:

2009

Language:

polish

File:

PDF, 109 KB

polish, 2009

26

Elektrogustometr uniwersalny EG-1

Pleskacz, Witold A., Wałkanis, Andrzej, Rapiejko, Piotr, Jurkiewicz, Dariusz

Journal:

Otolaryngologia Polska

Year:

2009

Language:

polish

File:

PDF, 337 KB

polish, 2009

27

VASO-MOTOR AND OTHER PHENOMENA ASSOCIATED WITH CERVICAL RIB.

Pleskacz, Witold A., Wałkanis, Andrzej, Rapiejko, Piotr, Jurkiewicz, Dariusz

Journal:

Year:

1910

Language:

english

File:

PDF, 169 KB

english, 1910

28

[IEEE 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - Liberec, Czech Republic (2009.04.15-2009.04.17)] 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - Enhanced LEON3 core for superscalar processing

Marcinek, Krzysztof, Luczyk, Arkadiusz W., Pleskacz, Witold A.

Year:

2009

Language:

english

File:

PDF, 434 KB

english, 2009

29

[IEEE 2008 11th International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS) - Bratislava, Slovakia (2008.04.16-2008.04.18)] 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems - Various MDCT implementations in 0.35¿m CMOS

Malik, Peter, Balaz, Marcel, Simlastik, Martin, Luczyk, Arkadiusz, Pleskacz, Witold

Year:

2008

Language:

english

File:

PDF, 2.50 MB

english, 2008

30

[IEEE 2014 21st International Conference "Mixed Design of Integrated Circuits & Systems" (MIXDES) - Lublin (2014.6.19-2014.6.21)] 2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES) - Simulink model of GFSK demodulator based on time-to-digital converter

Wiechowski, Lukasz, Siwiec, Krzysztof, Kopanski, Jakub, Pleskacz, Witold A.

Year:

2014

Language:

english

File:

PDF, 899 KB

english, 2014

31

[IEEE Comput. Soc 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - San Francisco, CA, USA (24-26 Oct. 2001)] Proceedings 2001 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - CMOS standard cells characterization for defect based testing

Pleskacz, W.A., Kasprowicz, D., Oleszczak, T., Kuzmicz, W.

Year:

2001

Language:

english

File:

PDF, 214 KB

english, 2001

32

[IEEE Systems (DDECS) - Cottbus, Germany (2011.04.13-2011.04.15)] 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems - A 5Gb/s equalizer for USB 3.0 receiver in 65 nm CMOS technology

Kopanski, Jakub, Pleskacz, Witold A., Pienkowski, Dariusz

Year:

2011

Language:

english

File:

PDF, 1.37 MB

english, 2011

33

[Lviv Polytech. Nat. Univ Modern Problems of Radio Engineering, Telecommunications and Computer Science - Lviv-Slavsko, Ukraine (18-23 Feb. 2002)] Modern Problems of Radio Engineering, Telecommunications and Computer Science (IEEE Cat. No.02EX542) - Multimedia manual for distance learning in technical university

Pfitzner, A., Piwowarska, E., Pleskacz, W.

Year:

2002

Language:

english

File:

PDF, 676 KB

english, 2002

34

[IEEE Comput. Soc 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Paris, France (20-22 Oct. 1997)] 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Improved yield model for submicron domain

Pleskacz, W.A., Maly, W.

Year:

1997

Language:

english

File:

PDF, 499 KB

english, 1997

35

[IEEE European Test Symposium (ETS'05) - Tallinn, Estonia (22-25 May 2005)] European Test Symposium (ETS'05) - DOT: New Deterministic Defect-Oriented ATPG Tool

Raik, J., Ubar, R., Sudbrock, J., Kuzmicz, W., Pleskacz, W.

Year:

2005

Language:

english

File:

PDF, 256 KB

english, 2005

36

[IEEE Comput. Soc 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Albuquerque, NM, USA (1-3 Nov. 1999)] Proceedings 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems (EFT'99) - Yield estimation of VLSI circuits with downscaled layouts

Year:

1999

Language:

english

File:

PDF, 223 KB

english, 1999

37

[IEEE Systems (DDECS) - Cottbus, Germany (2011.04.13-2011.04.15)] 14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems - A resistorless current reference source for 65 nm CMOS technology with low sensitivity to process, supply voltage and temperature variations

Lukaszewicz, Michal, Borejko, Tomasz, Pleskacz, Witold A.

Year:

2011

Language:

english

File:

PDF, 779 KB

english, 2011

38

[IEEE 8th Euromicro Conference on Digital System Design (DSD'05) - Porto, Portugal (30-03 Aug. 2005)] 8th Euromicro Conference on Digital System Design (DSD'05) - Defect-Oriented Test- and Layout-Generation for Standard-Cell ASIC Designs

Sudbrock, J., Raik, J., Ubar, R., Kuzmicz, W., Pleskacz, W.

Year:

2005

Language:

english

File:

PDF, 256 KB

english, 2005

39

[IEEE 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - Liberec, Czech Republic (2009.04.15-2009.04.17)] 2009 12th International Symposium on Design and Diagnostics of Electronic Circuits & Systems - Low voltage LNA implementations in 90 nm CMOS technology for multistandard GNSS

Gradzki, Jacek, Borejko, Tomasz, Pleskacz, Witold A.

Year:

2009

Language:

english

File:

PDF, 441 KB

english, 2009

40

[IEEE 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems - Krakow, Poland (2007.04.11-2007.04.13)] 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems - Power Dissipation in Basic Global Clock Distribution Networks

Sobczyk, Artur L., Luczyk, Arkadiusz W., Pleskacz, Witold A.

Year:

2007

Language:

english

File:

PDF, 323 KB

english, 2007

41

[IEEE 2008 11th International Workshop on Design and Diagnostics of Electronic Circuits and Systems (DDECS) - Bratislava, Slovakia (2008.04.16-2008.04.18)] 2008 11th IEEE Workshop on Design and Diagnostics of Electronic Circuits and Systems - Controllable Local Clock Signal Generator for Deep Submicron GALS Architectures

Sobczyk, Artur L., Luczyk, Arkadiusz W., Pleskacz, Witold A.

Year:

2008

Language:

english

File:

PDF, 386 KB

english, 2008

42

[IEEE Comput. Soc. Press Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Boston, MA, USA (6-8 Nov. 1996)] Proceedings. 1996 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Extraction of critical areas for opens in large VLSI circuits

Ouyang, C.H., Pleskacz, W.A., Maly, W.

Year:

1996

Language:

english

File:

PDF, 708 KB

english, 1996

43

[IEEE 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - Ciechocinek, Poland (2007.06.21-2007.06.23)] 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - Analysis of Basic Pausable Local Clock Signal Generator

Sobczyk, A., Luczyk, A. W., Pleskacz, W. A.

Year:

2007

Language:

english

File:

PDF, 282 KB

english, 2007

44

[IEEE 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - Tallinn, Estonia (2012.04.18-2012.04.20)] 2012 IEEE 15th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS) - AGATE - towards designing a low-power chip multithreading processor for mobile software defined radio systems

Marcinek, Krzysztof, Pleskacz, Witold A.

Year:

2012

Language:

english

File:

PDF, 498 KB

english, 2012

45

[IEEE 2014 21st International Conference "Mixed Design of Integrated Circuits & Systems" (MIXDES) - Lublin (2014.6.19-2014.6.21)] 2014 Proceedings of the 21st International Conference Mixed Design of Integrated Circuits and Systems (MIXDES) - Implementation of the Bluetooth receiver RF front-end in the CMOS-RF 130 nm technology

Pietron, Daniel, Siwiec, Krzysztof, Kopanski, Jakub, Pleskacz, Witold A.

Year:

2014

Language:

english

File:

PDF, 768 KB

english, 2014

46

[IEEE 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - Ciechocinek, Poland (2007.06.21-2007.06.23)] 2007 14th International Conference on Mixed Design of Integrated Circuits and Systems - The Influence of Defect Distribution Function Parameters on Test Patterns Generation

Rakowski, M., Pleskacz, W. A., Borkowski, P.

Year:

2007

Language:

english

File:

PDF, 260 KB

english, 2007

47

[IEEE Comput. Soc 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Paris, France (20-22 Oct. 1997)] 1997 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems - Detection of yield trends

Pleskacz, W.A., Maly, W., Heineken, H.T.

Year:

1997

Language:

english

File:

PDF, 348 KB

english, 1997

48

[IEEE 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - Vienna, Austria (2010.04.14-2010.04.16)] 13th IEEE Symposium on Design and Diagnostics of Electronic Circuits and Systems - A comparison of low voltage LNA architectures designed for multistandard GNSS in two 90 nm CMOS technologies

Gradzki, Jacek, Borejko, Tomasz, Pleskacz, Witold A.

Year:

2010

Language:

english

File:

PDF, 542 KB

english, 2010

49

[IEEE 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems - Krakow, Poland (2007.04.11-2007.04.13)] 2007 IEEE Design and Diagnostics of Electronic Circuits and Systems - ESD Failures of Integrated Circuits and Their Diagnostics Using Transmission Line Pulsing

Piatek, Z., Kolodziejski, J. F., Pleskacz, W. A.

Year:

2007

Language:

english

File:

PDF, 392 KB

english, 2007

50

[IEEE 2000 6th IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA 2000) - Catania, Italy (23-25 May 2000)] Proceedings of the 2000 6th IEEE International Workshop on Cellular Neural Networks and their Applications (CNNA 2000) (Cat. No.00TH8509) - IC design of 8×8 digital CNN with optoelectronic interface

Jankowski, S., Wielgus, A., Pleskacz, W.A., Buczynski, R., Wisniewski, M.

Year:

2000

Language:

english

File:

PDF, 290 KB

english, 2000

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